Back to Contents

DOS Diagnostic User's Guide

This chapter provides the following information:

Introduction

Prerequisites

Functions List

Function Description

Diagnostic Tests

Error Messages

Introduction

This document provides the information on how to use the DOS diagnostic utilities program on Broadcom NetXtreme™ Ethernet Controller.

All commands can be entered from DOS prompt or CLI, the Command Line Interface, prompt. When a program is run without parameters, the CLI mode is entered. Otherwise, the parameter will be used as the command to be executed and will exit the program when completed.

In CLI, assuming there are three devices in the system, all device information is displayed before each prompt as shown in the following example:

C Brd:Rv    Bus   PCI Spd Base Irq EEP     MAC          Fmw     Configuration
- ------- ------- --- --- ---- -- ---- ------------ ----------- --------------
0 5702:A2 02:0A:0 32  33  FEAF  3 128K 0010180416DB 5702-v2.24a PW,auto
1 5702:A2 02:0B:0 32  33  FEAD 11 128K 0010180416C4 5702-v2.24a PW,auto
 

Back to Top

Prerequisites

Back to Top

To access the Functions List, enter the command "b57udiag -cmd."

Functions List

cmd	Functions
upgfrm	Upgrade PXE or Boot Code from a file
dir	Displays the file directory in NVRAM
setwol	Enable/Disable WOL
setpxe	Enable/Disable PXE
setasf	Enable/Disable ASF
setmba	Enable Multiple Boot Agents
nictest	Run a set of NIC tests
exit	Exit the program
device	Show or switch device
version	Display program version
help	Display the commands available
dos	Execute a DOS command
reset	Reset chip
cls	Clear screen
asfprg	Program ASF firmware into NVRAM

Back to Top

Functions Description

upgfrm

cmd: upgfrm

Description: Upgrades PXE or Boot Code from a file.

Syntax: upgfrm [-options]

This command reads code from a file and programs it into the pxe or boot area. Both parameters, the programming target "pxe" or "boot" and filename, must be specified.

Options:
-f <string>	Input file
-p	Upgrade PXE code
-b	Upgrade Boot code
-d	Do not perform device check

dir

cmd: dir

Description: Displays the file directory in NVRAM.

Example:

Entry Type SRAM    Addr EEP  Offset     Length   Execute Version 
----- ------------ --------- ---------- -------- ------- ------- 
       BootCode    08003000  00000200   000011B0 CPUA (2) 5702-v2.24a        
  0    PXE         00010000  000013B0   0000C854 no       2.2.7

setwol

cmd: set wol

Description: Enables/Disables WOL.

Syntax: setwol [ -options]

Options:
-e	Enable WOL
-d	Disable WOL

setpxe

cmd: set pxe

Description: Enables/Disables PXE and sets PXE speed.

Syntax: setpxe [ -options]

Options:
-e	Enable PXE
-d	Disable PXE
-s<DEC>	Specify PXE speed (default = 0)
	Speed: 0 = auto 1 = 10 HD 2 = 10 FD 3 = 100 HD 4 = 100 FD

setasf

cmd: setasf

Description: Enable/Disable ASF.

Syntax: setasf [-options]

Options:
-e	Enable ASF
-d	Disable ASF

setmba

cmd: setmba

Description: Enables/Disables Multiple Boot Agent.

Syntax: setmba [ -options]

Options:
-e<DEC>	Specify MBA Protocol
	Protocol: 0 = pxe 1 = rpl 2 = bootp
-d	Disable MBA
-s<DEC>	Specify MBA speed (default = 0)
	Speed: 0 = auto 1 = 10 HD 2 = 10 FD 3 = 100 HD 4 = 100 FD

nictest

cmd: nictest

Description: Runs a set of NIC tests.

Syntax: nictest [test list]

Example: See Diagnostic Tests for details on test description.

abcd	runs all tests
b	runs all tests in group b
a3 b1	runs test a3 and b1 only
a124b2	runs tests a1, a2, a4 and b2

If no test list is entered, the diagcfg setting is used.

Options:
-n <DEC>	iteration
-e	run NVRAM verification also

exit

version

cmd: version

Description: Displays software version.

Syntax: version

Example:

C:\>b57udiag –version
Copyright (c) 2000, 2001 Broadcom Corporation, all rights reserved
Broadcom NetXtreme User Diagnostic 3.09 (06/14/02)

help

cmd: help

Description: Displays the help commands available.

Syntax: help

Example:

C:\>b57udiag –help
Copyright (c) 2000, 2001, 2002 Broadcom Corporation, all rights reserved
Broadcom NetXtreme User Diagnostic 3.09 (06/14/02)

cmd	Functions
upgfrm	Upgrade PXE or Boot Code from a file
dir	Displays the file directory in NVRAM
setwol	Enable/Disable WOL
setpxe	Enable/Disable PXE
setasf	Enable/Disable ASF
nictest	Run a set of NIC tests
exit	Exit the program
device	Show or switch device
version	Display program version
help	Display the commands available
DOS	Execute a DOS command
reset	Reset chip
cls	Clear screen
asfprg	Program ASF firmware into NVRAM

DOS

asfprg

cmd: asfprg

Description: Programs asf firmware into NVRAM

Syntax: asfprg [init_img [rx_img [tx_img]]]

The default files names are asfinit.bin, asfcpua.bin, and asfcpub.bin, which can be overwritten by parameters.

Options:
-v<HEX>	Verbose level (0,1,2) (def=00000001)

 

Back to Top

Diagnostic Tests

The tests are divided into four groups: Register Tests, Memory Tests, Miscellaneous Tests, and Data Tests. They are numbered as group A, B, C, and D.

Test Names

Group A.

A1. Indirect Register Test
A2. Control Register Test
A3. Interrupt Test
A4. BIST
A5. PCI Cfg Register Test

Group B.

B1. Scratch Pad Test
B2. BD SRAM Test
B3. DMA SRAM Test
B4. MBUF SRAM Test
B5. MBUF SRAM via DMA Test
B6. External SRAM Test

Group C.

C1. EEPROM Test
C2. CPU Test
C3. DMA Test
C4. MII Test
C5. VPD Test
C6. ASF Test
C7. ROM Expansion Test

Group D.

D1. Mac Loopback Test
D2. Phy Loopback Test
D3. RJ-45 Loopback Test
D4. MII Miscellaneous Test
D5. MSI Test

Test Descriptions

A1. Indirect Register Test

Command: regtest -i

Function: Uses indirect addressing method, writes increment data into the MAC hash register table, and reads data back for verification. The memory read/write is done 100 times while incrementing test data.

Default: Test Enabled

A2. Control Register Test

Command: regtest

Function: Each register specified in the configuration content defines the read-only bit and read/write bit. The test writes zeros and ones into the test bits to insure the read-only bits are not changed, and read/write bits are changed accordingly.

Default: Test Enabled.

Default Register table

The test will try to read the register configuration file ctrlreg.txt for the register definitions. If the file does not exist, a default register offset and mask bits will be used.

Offset     R/O Mask   R/W Mask
0x00000400 0x00000000 0x007fff8c
0x00000404 0x03800107 0x00000000

A3. Interrupt Test

Command: intrtest

Function: This test verifies the interrupt functionality. It enables an interrupt and waits 500 ms for the interrupt to occur and reports an error if it cannot generate the interrupt.

Default: Enabled

A4. BIST

Command: bist

Function: Hardware Built-In Self-Test (BIST). This test initiates BIST and waits for the test result returned by hardware.

Default: Due to the intermittent failure, this test is currently disabled by default.

A5. PCI Cfg Register Test

Command: pcicfg

Function: This test verifies the access integrity of the PCI configuration registers.

B1. Scratch Pad Test

Command: memtest -s

Function: This test tests the scratch pad SRAM onboard. The following tests are performed:

• Data Pattern Test: Writes test data into the SRAM and reads it back to ensure data is correct. The test data used is 0x00000000, 0xffffffff, 0xaa55aa55, and 0x55aa55aa.

• Alternate Data Pattern Test: Writes test data into the SRAM. Writes complement test data into the next address. Reads back both to insure the data is correct. After the test, the program reads back data one more time to insure the data stays correct. The test data used is 0x00000000, 0xffffffff, 0xaa55aa55, and 0x55aa55aa.

• Address Test: Writes each address with a unique increment data. Reads back data to insure data is correct. After filling the entire address with the unique data, the program reads back data again to insure data stays the same.

• WalkingOne Bit Test: For each address, data one is written and read back for testing. Then it shifts the data left one bit, so the data becomes two and repeats the same test. It repeats the test 32 times until the test bit is shifted out of the test address. The same test is repeated for entire test range.

• Pseudo-Random Data Test: A precalculated pseudo-random data set is used to write unique data into each test RAM. After the passing the test, the program reads back one more time to insure the data stays correct.

Default: Enabled

B2. BD SRAM Test

Command: memtest -b

Function: This test tests the BD SRAM. This test is performed the same as the Scratch Pad Test described in B1.

Default: Enabled

B3. DMA SRAM Test

Command: memtest -d

Function: It tests DMA SRAM by performing the Scratch Pad Test described in test B1.

Default: Enabled

B4. MBUF SRAM Test

Command: memtest -m

Function: It tests DMA SRAM by performing the Scratch Pad Test described in test B1.

Default: Enabled

B5. MBUF SRAM via DMA Test

Command: memtest -x

Function: Eight data test patterns are used. A 0x1000-sized data buffer is used for this test. Before each pattern test, the buffer is initialized and filled with the test pattern. It then performs a 0x1000-sized transmit DMA from the host buffer to the NIC MBUF memory. It verifies the data integrity in MBUF against the host memory and repeats the DMA for the entire MBUF buffer. Then, it performs receive DMA from NIC to host. The 0x1000-byte test buffer is cleared to zero before each receive DMA. After verifying the data integrity, the test is repeated for the entire MBUF SRAM range. The test patterns are described below.

Test Pattern	Description
16 00s and 16 FFs	Fills the entire host DMA buffer with 16 bytes of 00s and then 16 bytes of FFs.
16 FFs and 16 0's	Fills the entire host DMA buffer with 16 bytes of 00s and then 16 bytes of FFs.
32 00s and 32 FFs	Fills the entire host DMA buffer with 32 bytes of 00s and then 32 bytes of FFs.
32 00s and 32 FFs	Fills the entire host DMA buffer with 32 bytes of FF’s and then 32 bytes of 00’s.
00000000	Fills the entire host DMA buffer with all zeros.
FFFFFFFF	Fills the entire host DMA buffer with all FFs.
AA55AA55	Fills the entire host DMA buffer with data 0xAA55AA55.
55AA55AA	Fills the entire host DMA buffer with data 0xAA55AA55.

Default: Enabled

B6. External SRAM Test

Command: memtest -e

Function: It tests DMA SRAM by performing the Scratch Pad Test described in test B1.

Default: Disabled

C1. EEPROM Test

Command: setest

Function: Incremental test data is used in the EEPROM test. It fills the test data into the test range and reads it back to verity the content. After the test, it fills the test range with zeros to clear the memory.

Default: Enabled

C2. CPU Test

Command: cputest

Function: This test opens the cpu.bin file. If the file exists and content is good, it loads code to the Rx and Tx CPU and verifies CPU execution.

Default: Enabled

C3. DMA Test

Command: dmatest

Function: Both high and low priority DMA are tested. It moves data from host memory to NIC SRAM, verifies data, and then moves data back to host memory again to verify the data.

Default: Enabled

C4. MII Test

Command: miitest

Function: The function is identical to the Control Register Test, A2. Each register specified in the configuration contents defines the read-only and read/write bits. The test writes zeros and ones into the test bits to insure the read-only bit values are not changed and the read/write bits are changed accordingly.

Default: Test Enabled.

Default Register table

The test attempts to read the register configuration file, miireg.txt for the register definitions. If the file does not exists, the following table is used:

Offset 		R/O Mask	R/W Mask
0x00 		0x0000 		0x7180 
0x02 		0xffff 		0x0000 
0x03 		0xffff 		0x0000 
0x04 		0x0000 		0xffff 
0x05 		0xefff 		0x0000 
0x06 		0x0001 		0x0000 
0x07 		0x0800 		0xb7ff 
0x08 		0xffff 		0x0000 
0x09 		0x0000 		0xff00 
0x0a 		0x7c00 		0x0000 
0x10 		0x0000 		0xffbf 
0x11 		0x3300 		0x0000 
0x19 		0x001f 		0x0000 
0x1e 		0x0000 		0xffff 
0x1f 		0x0000 		0xffff 

C5. VPD Test

Command: vpdtest

Function: The VPD test saves the content of VPD first before performing the test. Once it is done, it writes one of the five test data patterns, 0xff, 0xaa, 0x55, increment data, or decrement data, into VPD memory. By default, an incremental data pattern is used. It writes and reads back the data for the entire test range, and then restores the original content.

Default: Disabled

C6. ASF Test

1. Reset test.

   Sets reset bit and polls for self-clearing. Verifies the reset value of the registers.

2. Event Mapping Test

   Sets SMB_ATTN bit. By changing ASF_ATTN LOC bits, verifies the mapping bits in TX_CPU or RX_CPU event bits.

3. Counter Test

C7. ROM Expansion Test

Command: romtest

Function: This function tests the ability to enable/disable/access the expansion ROM on the device.

D1. Mac Loopback Test

Command: pkttest -m

Function: This is an internal loopback data transmit/receive test. It initializes MAC into internal loopback mode and transmits 100 packets. The data should be routed back to the receive channel and received by the receive routine, which verifies the integrity of data. A 100-megabit rate is used for this test unless Gigabit is enabled.

Default: Enabled

D2. Phy Loopback Test

Command: pkttest -p

Function: This test is same as the Mac Loopback Test , D1, except the data is routed back via physical layer device. A 100-megabit rate is used for this test unless Gigabit is enabled.

Default: Enabled

D3. RJ-45 Loopback Test

D4. MII Miscellaneous Test

Command: None

Function: This function tests the auto-polling and phy-interrupt capabilities. These are functions of the PHY.

Default: Enabled

D5. MSI Test

Command: msitest

Function: This function tests the Message Signal Interrupt capability of the device. Refer to PCI Specification, version 2.2 for MSI definition.

Default: Disabled

 

Back to Top

Error Messages

/* 0 */ 	"PASS",
/* 1 */ 	"Got 0x%08X @ 0x%08X. Expected 0x%08X",
/* 2 */ 	"Cannot perform task while chip is running",
/* 3 */ 	"Invalid NIC device",
/* 4 */ 	"Read only bit %s got changed after writing zero at offset 0x%X",
/* 5 */ 	"Read only bit %s got changed after writing one at offset 0x%X",
/* 6 */ 	"Read/Write bit %s did not get cleared after writing zero at offset 0x%X",
/* 7 */ 	"Read/Write bit %s did not get set after writing one at offset 0x%X",
/* 8 */ 	"BIST failed",
/* 9 */ 	"Could not generate interrupt",
/* 10 */ 	"Aborted by user",
/* 11 */ 	"TX DMA:Got 0x%08X @ 0x%08X. Expected 0x%08X",    
/* 12 */ 	"Rx DMA:Got 0x%08X @ 0x%08X. Expected 0x%08X",    
/* 13 */ 	"TX DMA failed",
/* 14 */ 	"Rx DMA failed",
/* 15 */ 	"Data error, got 0x%08X at 0x%08X, expected 0x%08X",
/* 16 */ 	"Second read error, got 0x%08X at 0x%08X, expected 0x%08X",
/* 17 */ 	"Failed writing EEPROM at 0x%04X",
/* 18 */ 	"Failed reading EEPROM at 0x%04X",
/* 19 */ 	"EEPROM data error, got 0x08X at 0x04X, expected 0x%08X",
/* 20 */ 	"Cannot open file %s",
/* 21 */ 	"Invalid CPU image file %s",
/* 22 */ 	"Invalid CPU image size %d",
/* 23 */ 	"Cannot allocate memory",
/* 24 */ 	"Cannot reset CPU",    
/* 25 */ 	"Cannot release CPU", 
/* 26 */ 	"CPU test failed",       
/* 27 */ 	"Invalid Test Address Range\nValid NIC address is 0x%08X-0x%08X and exclude 0x%08X-0x%08X",
/* 28 */    "DMA:Got 0x%08X @ 0x%08X. Expected 0x%08X", 
/* 29 */    "Unsupported PhyId %04X:%04X",
/* 30 */    "Too many registers specified in the file, max is %d",
/* 31 */ 	"Cannot write to VPD memory",
/* 32 */ 	"VPD data error, got %08X @ 0x04X, expected %08X",
/* 33 */ 	"No good link! Check Loopback plug",
/* 34 */ 	"Cannot TX Packet!", 
/* 35 */ 	"Requested to TX %d. Only %d is transmitted",       
/* 36 */	"Expected %d packets. Only %d good packet(s) have been received\n%d unknown packets have been received.\n%d bad packets have been received.",
/* 37 */ 	"%c%d is an invalid Test",
/* 38 */ 	"EEPROM checksum error",
/* 39 */ 	"Error in reading WOL/PXE",
/* 40 */ 	"Error in writing WOL/PXE",
/* 41 */ 	"No external memory detected",
/* 42 */ 	"DMA buffer %04X is large, size must be less than %04X",  
/* 43 */ 	"File size %d is too big, max is %d",
/* 44 */ 	"Invalid %s",
/* 45 */ 	"Failed writing 0x%x to 0x%x",
/* 46 */ 	"",
/* 47 */ 	"Ambiguous command",
/* 48 */ 	"Unknown command",
/* 49 */ 	"Invalid option",
/* 50 */ 	"Cannot perform task while chip is not running. (need driver)",
/* 51 */ 	"Cannot open register define file or content is bad",
/* 52 */ 	"ASF Reset bit did not self-cleared",
/* 53 */ 	"ATTN_LOC %d cannot be mapped to %cX CPU event bit %d",
/* 54 */ 	"%s Register is not cleared to zero after reset",
/* 55 */ 	"Cannot start poll_ASF Timer",
/* 56 */ 	"poll_ASF bit did not get reset after acknowledged",
/* 57 */ 	"Timestamp Counter is not counting",
/* 58 */ 	"%s Timer is not working",
/* 59 */ 	"Cannot clear bit %s in %cx CPU event register",
/* 60 */ 	"Invalid "EEPROM_FILENAME" file size, expected %d but only can read %d bytes",
/* 61 */ 	"Invalid magic value in %s, expected %08x but found %08x",
/* 62 */ 	"Invalid manufacture revision, expected %c but found %c",
/* 63 */ 	"Invalid Boot Code revision, expected %d.%d but found %d.%d",
/* 64 */ 	"Cannot write to EEPROM",
/* 65 */ 	"Cannot read from EEPROM",
/* 66 */ 	"Invalid Checksum",
/* 67 */ 	"Invalid Magic Value",
/* 68 */ 	"Invalid MAC address, expected %02X-%02X-%02X-%02X-%02X-%02X",
/* 69 */ 	"Slot error, expected an UUT to be found at location %02X:%02X:00",
/* 70 */ 	"Adjacent memory has been corrupted while testing block 0x%08x-0x%08x\nGot 0x%08x @ address 0x%08x. Expected 0x%08x",
/* 71 */ 	"The function is not Supported in this chip",
/* 72 */ 	"Packets received with CRC error",
/* 73 */ 	"MII error bits set: %04x",
/* 74 */ 	"CPU does not initialize MAC address register correctly",
/* 75 */ 	"Invalid firmware file format",
/* 76 */ 	"Resetting TX CPU Failed",
/* 77 */ 	"Resetting RX CPU Failed",
/* 78 */ 	"Invalid MAC address",
/* 79 */ 	"Mac address registers are not initialized correctly",
/* 80 */ 	"EEPROM Bootstrap checksum error",

Back to Top

Back to Contents